Computers are typically classified into two categories: hardwired or microprogrammed. A hardwired computer's instructions are executed by hardwired electronic circuit logic. While such an implementation is fast, hardwired logic is rigid and cannot he altered without redesigning the logic circuit. A microprogrammed (or microcoded) computer's instructions, on the other hand, are executed by a sequence of primitive operations, called microoperations, that are specified by microinstructions in a control memory. A typical microoperation is a register to register transfer operation which can be executed in one clock cycle. Sequences of microinstructions, called microprograms, are stored in a control memory which is typically a read-only memory (ROM). By altering microprograms in control memory, a processor can be made to behave like different types of computers. For example, a processor can be microprogrammed to behave like an Intel or Motorola microprocessor by simply switching sets of microprograms (called emulators) stored internally in the ROM. This process of having one computer behave like another is called emulation.
Emulation has a significant commercial implication as well, allowing rapid cloning of popular microprocessors, e.g., the Intel 80X86 or the Motorola 680X0, that dominate the personal computer (PC) market. Currently, the class of Intel 80X86 microprocessors comprise the 80286, 80386, i486, Pentium and other similar Intel CISC processors. Similarly, the class of Motorola 680X0 microprocessors comprise the 68020, 68030, 68040 and other similar Motorola CISC microprocessors. By microprogramming control logic in ROM, a "generic" microprocessor can become a clone to a popular microprocessor so that the clone can execute without modification any software written for the popular microprocessor. In the case that it has a significantly different architecture, the new microprocessor is called a software compatible clone. The clone can then become a low cost alternative and a commercial competitor to the original microprocessor.
Commercially available computers are also typically characterized as having either CISC (complex instruction set) or RISC (reduced instruction set) architectures. With a CISC architecture, an extensive instruction set is either hardwired or microprogrammed into the logic on a single chip, normally referred to as a microprocessor, that executes a fixed instruction set. Due to the complexity of the instruction set, CISC architectures typically are fairly complex, requiring large amounts of gates for implementation and associated power dissipation and normally requiring multiple clock cycles for execution of each instruction. However, with a RISC architecture the complexity of the chip is reduced by utilizing microinstructions which perform a limited subfunction of a CISC instruction, generally within a single clock cycle. This architectural choice results in a chip that requires less gates, less power and having instructions that execute significantly faster. Although each instruction accomplishes less, complex functions can be performed by combinations of the RISC instructions that are more closely tailored to a desired task than a CISC instruction that was designed to be more general purpose. Thus, a RISC computer will normally outperform a CISC computer for many types of operations. Additionally, hardware implementations of RISC computers are typically simpler and thus less expensive than CISC implementations.
While current RISC architectures are potentially capable of emulating target CISC instruction sets, this ability is limited. For example, the number and size of the registers may be significantly different between the RISC and target computers, the method of calculating and presenting condition codes may be different and the ability to parse the target instructions and relate the parsed quantities to existing registers only exists through prolonged sequences of RISC instructions. Thus, the performance of potential emulations with current RISC computers would be severely degraded and thus not feasible for most applications. To avoid these degradations, what is needed is:
1. a scheme to decode, quickly and accurately, the instruction formats of a computer being emulated; and PA1 2. a scheme to redefine the register set, operand size and condition code calculation logic of the RISC processor according to the computer being emulated.
For this application, the following terminology is defined:
Emulation is a process in which one computer X behaves identically to another computer Y, as X executes the instructions of Y, where the internal architectures of computers X and Y are different.
A host processor is computer X which behaves like computer Y as X executes the instructions of Y.
A target processor is computer Y which is emulated by host processor X. That is, host processor X emulates target processor Y.
Microcode is a set of programs, called microprograms, that are coded in microinstructions, the native instructions of the host processor. Microinstructions are typically executed in one clock cycle to control a processor at its lowest level of specification, such as register transfers, basic arithmetic and logical operations or control transfers.
Native mode of execution is a non-emulation mode of execution by a processor; that is, execution of a computer within its inherent architecture without regard to emulation or compatibility to other computers.